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1+ | 0,486 € |
10+ | 0,337 € |
100+ | 0,274 € |
500+ | 0,242 € |
1000+ | 0,233 € |
2500+ | 0,224 € |
5000+ | 0,215 € |
Informação do produto
Descrição geral do produto
The SN74LVC2G74QDCURQ1 is a single positive-edge-triggered D-type Flip-flop with clear and preset. It is designed for 1.65 to 5.5V VCC operation. A low level at the preset (PRE\) or clear (CLR\) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
- 6.9ns at 3.3V Maximum tpd
- Ioff Supports partial-power-down mode operation
- Latch-up performance exceeds 100mA per JESD 78, class II
- 10µA Maximum low power consumption
- ±24mA Output drive at 3.3V
- Green product and no Sb/Br
Aplicações
Automotive
Especificações Técnicas
74LVC2G74
5.4ns
24mA
VSSOP
Positive Edge
1.65V
74LVC
-40°C
-
No SVHC (27-Jun-2018)
D
140MHz
VSSOP
8Pins
Complementary
5.5V
7474
125°C
-
Legislação e Ambiente
País onde se realizou a maior parte do processo de produçãoPaís de origem:Thailand
País onde se realizou a maior parte do processo de produção
RoHS
RoHS
Certificado de conformidade de produto